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For mostly non-AMD related news this week, Intel has announced multiple new technologies focused on chip packaging, in addition to hiring a new CCO in Claire Dixon. MSI is updating its AM4 400-series of motherboard to include a larger BIOS chip, there’s a new PCIe 4.0 SSD coming, with a presumably cheaper 500GB capacity, and we’re expecting custom Navi cards in August. The news stories follow the video embed, per the usual.
That Intel “Comet Lake” Slide is Fake
Last week saw the publication of a “Processor Details” slide that was allegedly from Intel, including promises of a host of new Comet Lake CPUs, high core counts, competitive pricing, and high frequencies. Although Intel Corporation does not comment on rumors, we spoke with sources close to the matter and confirmed that this slide is not made by Intel and is a fake slide. At present, it’s probably best to just know that yes, new CPUs will come out, but we don’t know the specs at the moment. Similar to rumors of 5GHz Ryzen CPUs for Zen2, it’s probably best to just ignore them until we get close enough to launch that there are more realistic leaks from board partners, rather than made-up slides.
Intel’s New Interconnect & Packaging
As the monolithic die approach to building chips gets more complex and limited by physics, both AMD and Intel have taken a chiplet approach. At Semicon West, Intel took the lid off new packaging and interconnect technologies that the chipmaker claims will carry chip designs into the future.
Intel’s new packaging technology is called Co-EMIB, and it essentially combines Embedded Multi-Die Interconnect (EMIB) and Foveros. If you recall, Intel debuted EMIB back in 2017 when it announced a partnership with AMD to bring Intel processors with Radeon graphics to market. That partnership resulted in the Kaby Lake G chip with Radeon Vega graphics, powering the Hades Canyon NUC we tested and overclocked extensively.
Foveros is relatively new, however, only being announced late last year. Foveros is a 3D chip stacking technology, resulting in what Intel calls hybrid x86 processors. Chips using Foveros are slated to debut in Intel’s 10nm Lakefield lineup. By using both Foveros and EMIB, hence Co-EMIB, Intel claims it allows for “linkage of even more computing performance and capability together.” In addition to connecting multiple Foveros elements, designers can also link other “tiles” (see: chiplets) such as analog or memory components.
Then there’s the new Omni-Directional Interconnect (ODI). ODI is a communications framework that combines the horizontal communication of EMIB and the vertical communication of Foveros. ODI uses large through silicon vias (TVS) to communicate and deliver power vertically through the base die. The larger TVSs offer less resistance, and facilitate higher bandwidth. This approach also means Intel can use less TVSs, optimizing die space.
Lastly, Intel discussed a new die-to-die interface, known as MDIO. MDIO is more of a modular system composed of a library of intellectual property blocks, and is based on Intel’s Advanced Interface Bus (AIB) PHY level interconnect.
Intel Hires Former VMWare Officer for Communications
Intel has hired Claire Dixon as corporate vice president and chief communications officer (CCO). Dixon’s new role at Intel was effective July 1st, where she will report to Michelle Johnston Holthaus, senior vice president and general manager of Intel’s sales and marketing group and interim CMO, according to Intel. Dixon will be responsible for overseeing Intel’s global communications organization, including corporate communications and events, product public relations, employee communications and analyst relations.
Dixon formerly worked for VMWare, where she served as senior vice president and chief communications officer. Prior to that, Dixon was vice president of global communications at ebay.
In the wake of AMD’s Ryzen 3000 launch, prices have been dropped significantly on last generation’s Ryzen 2000 chips. Currently, the Ryzen 5 2600X is retailing for $160 at Amazon, a pretty hefty discount over its $260 MSRP. Meanwhile, the Ryzen 5 2600 is going for $140, or roughly $60 off its $200 launch price. Finally, the flagship Ryzen 7 2700X has been dropped to $249, whereas it launched with a $330 price tag.
AMD’s second generation of Threadripper is getting its own price cuts as well. With the Ryzen 9 3900X encroaching on the bottom rung of the Threadripper 2000 product stack, it makes sense for AMD to drop prices on the Threadripper 2950X and Threadripper 2920X. When the Ryzen 9 3950X debuts in September, these price drops will make even more sense, as the chip will no doubt further cannibalize last-gen Threadripper.
The Threadripper 2950X is currently listed at $730, a fair ways south of its $899 launch price. Alternatively, AMD’s Threadripper 2920X is going for $340 at B&H. The 2920X debuted at $649.
There’s already a few PCIe 4.0 SSDs hitting the market, all based on Phison’s PS5016-E16 controller. So far, we know about models from Gigabyte, Corsair, and Sabrent. Now, Galax is ready to enter the as-of-yet uncrowded PCIe 4.0 arena. As with the previous SSDs based on the new PCIe 4.0 standard, Galax’s new HOF Pro will use the Phison PS5016-E16 controller, and Toshiba’s 96-layer, 3D TLC NAND.
The Galax HOF Pro will be based on the M.2 2280 form factor, and will be passively cooled with an aluminum heatsink. The Galax HOF Pro does manage to differentiate itself a bit in offering a 500GB capacity option. Sequential read/write speeds vary based on model, but the 2TB offering tops out at 5GB/s read, and 4.4GB/s write, which is in line with on-paper specs we’ve seen from other PCIe 4.0 SSDs.
While there’s no word on price, the drives are expected to hit retail channels by the end of the month.
Samsung recently confirmed that its foundry has certified full flow tools from both Cadence and Synopsys. The new tools will be used for chip designs based on Samsung’s 5nm 5LPE (Low Power Early) node. Samsung certified both the Cadence Full-Flow Digital Solution full-flow design tools and the Synopsys Fusion Design Platform using Arm Cortex-A53 and Arm Cortex-A57 cores.
“As part of our longstanding collaboration with Cadence, we’ve confirmed that its digital full-flow meets and exceeds the requirements for designing with the 5LPE process technology,” said Jung Yun Choi, vice president of the Design Technology Team at Samsung Electronics.
Separately, Choi also commented on Samsung’s collaboration with Synopsys. "Synopsys continues to be our vendor of choice for collaboration on new node development and enablement, so our foundry customers can confidently ramp their designs to volume production in all market segments, including automotive, AI, high-performance computing, and mobile."
According to Anandtech, the newly certified tools include compilers, validators, power circuit optimizers, and EUV-specific tools.
In our AMD Radeon RX 5700 XT review, we primarily took issue with faulty drivers and poor thermals. The former will (eventually) be fixed by AMD, and the latter will fall to AIB partners. AMD’s Navi GPUs suffer from the insufficient, and all too common blower style cooler. Needless to say, there’s plenty of room for AIB partners to innovate with custom cooling solutions.
According to Scott Herkelman, the Vice President and General Manager of Radeon, custom Navi cards won’t be here until mid-August. “Hey all, Custom AIB designs will be hitting the market ~mid August,” said Herkelman via a Reddit thread. Herkelman also offered some justification of sorts for the blower fan cooler.
“The Radeon group historically has had a bad reputation of producing product launch charts that didn’t match up to real world performance. Love it or hate it the blower allowed us to guarantee performance in every system to match our launch charts. Not everyone cools their PC as good as a reviewer and definitely not as good as some of the pictures you guys have shared. It was my goal to clean all of this up so that you can trust our performance you hear from us on stage.”
MSI Updates AM4 400-Series Boards with 32MB BIOS Chips
With AMD’s growing family of processors, backwards compatibility on socket AM4 boards is becoming a challenge for some motherboard vendors. In particular, MSI has had issues with 16MB BIOS chips on 300 and 400-series motherboards. To resolve this, MSI is relaunching AM4 400-series boards with 32MB chips to better accommodate microcode updates and storage.
The new boards will have the “Max” identifier attached to them, as reported by Polish site PurePC and Tom’s Hardware.
A320m-A Pro Max
B450M-A Pro Max
B450M Pro-VDH Max
B450 Gaming Plus Max
B450M Pro-M2 Max
B450M Mortar Max
B450 Tomahawk Max
B450-A Pro Max
X470 Gaming Pro Max
X470 Gaming Plus Max
It’s unclear if any other models will get the larger BIOS chips, or if MSI will upgrade the BIOS chips in the 300-series boards.